Tessell compute shapes
Tessell offers a large number of compute shapes that you can choose depending on your workload type. A compute shape determines the number of VCPUs, the amount of memory and storage that gets allocated to your instance. With Tessell, you can choose from a variety of compute shapes for both AWS, Azure and GCP cloud for your high performance and standard workloads. All compute shapes support the x86 architecture.
High performance compute shapes
High Performance compute shapes for AWS and Azure come with the specified VCPUs, memory, storage, and Read/Write IOPS.
AWS
This table provides lists the compute shapes for your high performance databases hosted on the AWS cloud platform:
Name
VCPUs
Memory (GiB)
Storage (GiB)
Storage (GiB) SQL Server
Read IOPS
Write IOPS
tesl_2h_a_p
2
15.3
200
442
50,000
17,500
tesl_2h_a
2
16
200
435
50,000
27,500
tesl_2h_c
2
16
200
1164
50,000
27,500
tesl_4h_a_p
4
30.5
400
884
103,000
35,000
tesl_4h_c
4
32
1000
2328
85,000
65,000
tesl_4h_a
4
32
400
872
100,000
55,000
tesl_8h_a_p
8
61
800
1769
206,000
90,000
tesl_8h_c
8
64
2000
4656
170,000
130,000
tesl_8h_a
8
64
800
1788
200,000
110,000
tesl_12h_a
12
96
3000
6984
250,000
200,000
tesl_16h_a_p
16
122
1600
3539
412,500
180,000
tesl_16h_a
16
128
1600
3492
400,000
220,000
tesl_24h_a
24
192
6500
13969
500,000
400,000
tesl_32h_a_p
32
244
3000
7078
825,000
360,000
tesl_32h_a
32
256
3000
6984
800,000
440,000
tesl_48h_a
48
384
13000
27939
1,000,000
800,000
tesl_64h_a_p
64
488
6500
14156
1,650,000
720,000
tesl_64h_a
64
512
6500
13969
1,600,000
880,000
Azure
This table lists the compute shapes for your high performance databases hosted on the Azure cloud platform:
Name
VCPUs
Memory(GiB)
Storage(GiB)
Storage (GiB) SQL Server
IOPS
tesl_8h_a
8
64
800
1788
400,000
tesl_16h_a
16
128
1500
3576
800,000
tesl_32h_a
32
256
3400
7152
1,500,000
tesl_48h_a
48
384
5000
10728
2,200,000
tesl_64h_a
64
512
6500
14305
2,900,000
tesl_80h_a
80
640
8500
17881
3,800,000
Standard performance compute shapes
Standard performance compute shapes come with the specified VCPUs along with standard storage that is expandable depending on the shape that you choose.
AWS
This table lists the compute shapes for your standard performance databases hosted on the AWS cloud platform:
tesl_2_a
2
4
t3.medium
43.375
2000
260.625
11800
Micro
2
1
t3.medium
43.375
2000
260.625
11800
Small
2
1
t3.medium
43.375
2000
260.625
11800
Medium
2
1
t3.medium
43.375
2000
260.625
11800
Large
2
1
t3.medium
43.375
2000
260.625
11800
tesl_2_b
2
8
m5.large
81.25
3600
593.75
18750
tesl_2_c
2
16
r5.large
81.25
3600
593.75
18750
tesl_4_a
4
16
m5.xlarge
143.75
6000
593.75
18750
tesl_4_b
4
32
r5.xlarge
143.75
6000
593.75
18750
tesl_8_a
8
32
m5.2xlarge
287.5
12000
593.75
18750
tesl_8_b
8
64
r5.2xlarge
287.5
12000
593.75
18750
tesl_16_a
16
64
m5.4xlarge
593.75
18750
593.75
18750
tesl_16_b
16
128
r5.4xlarge
593.75
18750
593.75
18750
tesl_32_a
32
128
m5.8xlarge
850
30000
850
30000
tesl_bma_2_a
2
16
r5.large
81.25
3600
593.75
18750
tesl_bma_4_a
4
32
r5.xlarge
143.75
6000
593.75
18750
tesl_bma_8_a
8
64
r5.2xlarge
287.5
12000
593.75
18750
tesl_bma_16_a
16
128
r5.4xlarge
593.75
18750
593.75
18750
tesl_bma_32_a
32
256
r5.8xlarge
850
30000
850
30000
tesl_bma_48_a
48
384
r5.12xlarge
1187.5
40000
1187.5
40000
tesl_bma_64_a
64
512
r5.16xlarge
1700
60000
1700
60000
tesl_bma_96_a
96
768
r5.24xlarge
2375
80000
2375
80000
tesl_2_c_a
2
16
r6a.large
81.25
3600
1250
40000
tesl_4_b_a
4
32
r6a.xlarge
156.25
6000
1250
40000
tesl_8_b_a
8
64
r6a.2xlarge
312.5
12000
1250
40000
tesl_8_c
8
32
t3a.2xlarge
86.875
4000
347.5
15700
tesl_16_b_a
16
128
r6a.4xlarge
625
20000
1250
40000
tesl_96_b_a
96
768
r5.24xlarge
2375
80000
2375
80000
tesl_r6i_16
16
128
r6i.4xlarge
625
20000
1250
40000
tesl_r6i_32
32
256
r6i.8xlarge
1250
40000
1250
40000
tesl_r6i_64
64
512
r6i.16xlarge
2500
80000
2500
80000
tesl_r6i_96
96
768
r6i.24xlarge
3750
120000
3750
120000
tesl_r6a_32
32
256
r6a.8xlarge
1250
40000
1250
40000
tesl_r6a_64
64
512
r6a.16xlarge
2500
80000
2500
80000
tesl_r6a_96
96
768
r6a.24xlarge
3750
120000
3750
120000
tesl_r7a_2
2
16
r7a.large
81.25
3600
1250
40000
tesl_r7a_4
4
32
r7a.xlarge
156.25
6000
1250
40000
tesl_r7a_8
8
64
r7a.2xlarge
312.5
12000
1250
40000
tesl_r7a_16
16
128
r7a.4xlarge
625
20000
1250
40000
tesl_r7a_32
32
256
r7a.8xlarge
1250
40000
1250
40000
tesl_r7i_2
2
16
r7i.large
81.25
3600
1250
40000
tesl_r7i_4
4
32
r7i.xlarge
156.25
6000
1250
40000
tesl_r7i_8
8
64
r7i.2xlarge
312.5
12000
1250
40000
tesl_r7i_16
16
128
r7i.4xlarge
625
20000
1250
40000
tesl_r7i_32
32
256
r7i.8xlarge
1250
40000
1250
40000
tesl_r7i_48
48
384
r7i.12xlarge
1875
60000
1875
60000
tesl_r7i_64
64
512
r7i.16xlarge
2500
80000
2500
80000
tesl_r7i_96
96
768
r7i.24xlarge
3750
120000
3750
120000
tesl_m6a_2
2
8
m6a.large
81.25
3600
1250
40000
tesl_m6a_4
4
16
m6a.xlarge
156.25
6000
1250
40000
tesl_m6a_8
8
32
m6a.2xlarge
312.5
12000
1250
40000
tesl_m6a_16
16
64
m6a.4xlarge
625
20000
1250
40000
tesl_m6a_32
32
128
m6a.8xlarge
1250
40000
1250
40000
tesl_m6a_48
48
192
m6a.12xlarge
1875
60000
1875
60000
tesl_m6a_64
64
256
m6a.16xlarge
2500
80000
2500
80000
tesl_m6a_96
96
384
m6a.24xlarge
3750
120000
3750
120000
tesl_m6a_128
128
512
m6a.32xlarge
5000
160000
5000
160000
tesl_m6a_192
192
768
m6a.48xlarge
5000
240000
5000
240000
tesl_m6i_2
2
8
m6i.large
81.25
3600
1250
40000
tesl_m6i_4
4
16
m6i.xlarge
156.25
6000
1250
40000
tesl_m6i_8
8
32
m6i.2xlarge
312.5
12000
1250
40000
tesl_m6i_16
16
64
m6i.4xlarge
625
20000
1250
40000
tesl_m6i_32
32
128
m6i.8xlarge
1250
40000
1250
40000
tesl_m6i_48
48
192
m6i.12xlarge
1875
60000
1875
60000
tesl_m6i_64
64
256
m6i.16xlarge
2500
80000
2500
80000
tesl_m6i_96
96
384
m6i.24xlarge
3750
120000
3750
120000
tesl_m6i_128
128
512
m6i.32xlarge
5000
160000
5000
160000
tesl_c6a_2
2
4
c6a.large
81.25
3600
1250
40000
tesl_c6a_4
4
8
c6a.xlarge
156.25
6000
1250
40000
tesl_c6a_8
8
16
c6a.2xlarge
312.5
12000
1250
40000
tesl_c6a_16
16
32
c6a.4xlarge
625
20000
1250
40000
tesl_c6a_32
32
64
c6a.8xlarge
1250
40000
1250
40000
tesl_c6a_48
48
96
c6a.12xlarge
1875
60000
1875
60000
tesl_c6a_64
64
128
c6a.16xlarge
2500
80000
2500
80000
tesl_c6a_96
96
192
c6a.24xlarge
3750
120000
3750
120000
tesl_c6a_128
128
256
c6a.32xlarge
5000
160000
5000
160000
tesl_c6a_192
192
384
c6a.48xlarge
5000
240000
5000
240000
tesl_c6i_2
2
4
c6i.large
81.25
3600
1250
40000
tesl_c6i_4
4
8
c6i.xlarge
156.25
6000
1250
40000
tesl_c6i_8
8
16
c6i.2xlarge
312.5
12000
1250
40000
tesl_c6i_16
16
32
c6i.4xlarge
625
20000
1250
40000
tesl_c6i_32
32
64
c6i.8xlarge
1250
40000
1250
40000
tesl_c6i_48
48
96
c6i.12xlarge
1875
60000
1875
60000
tesl_c6i_64
64
128
c6i.16xlarge
2500
80000
2500
80000
tesl_c6i_96
96
192
c6i.24xlarge
3750
120000
3750
120000
tesl_c6i_128
128
256
c6i.32xlarge
5000
160000
5000
160000
tesl_c7i_2
2
4
c7i.large
81.25
3600
1250
40000
tesl_c7i_4
4
8
c7i.xlarge
156.25
6000
1250
40000
tesl_c7i_8
8
16
c7i.2xlarge
312.5
12000
1250
40000
tesl_c7i_16
16
32
c7i.4xlarge
625
20000
1250
40000
tesl_c7i_32
32
64
c7i.8xlarge
1250
40000
1250
40000
tesl_c7i_48
48
96
c7i.12xlarge
1875
60000
1875
60000
tesl_c7i_64
64
128
c7i.16xlarge
2500
80000
2500
80000
tesl_c7i_96
96
192
c7i.24xlarge
3750
120000
3750
120000
tesl_c7i_192
192
384
c7i.48xlarge
5000
240000
5000
240000
tesl_c7a_2
2
4
c7a.large
81.25
3600
1250
40000
tesl_c7a_4
4
8
c7a.xlarge
156.25
6000
1250
40000
tesl_c7a_8
8
16
c7a.2xlarge
312.5
12000
1250
40000
tesl_c7a_16
16
32
c7a.4xlarge
625
20000
1250
40000
tesl_c7a_32
32
64
c7a.8xlarge
1250
40000
1250
40000
tesl_c7a_48
48
96
c7a.12xlarge
1875
60000
1875
60000
tesl_c7a_64
64
128
c7a.16xlarge
2500
80000
2500
80000
tesl_c7a_96
96
192
c7a.24xlarge
3750
120000
3750
120000
tesl_c7a_128
128
256
c7a.32xlarge
5000
160000
5000
160000
tesl_c7a_192
192
384
c7a.48xlarge
5000
240000
5000
240000
tesl_c5a_2
2
4
c5a.large
25
800
396.25
13300
tesl_c5a_4
4
8
c5a.xlarge
50
1600
396.25
13300
tesl_c5a_8
8
16
c5a.2xlarge
100
3200
396.25
13300
tesl_c5a_16
16
32
c5a.4xlarge
197.5
6600
396.25
13300
tesl_c5a_32
32
64
c5a.8xlarge
396.25
13300
396.25
13300
tesl_c5a_48
48
96
c5a.12xlarge
593.75
20000
593.75
20000
tesl_c5a_64
64
128
c5a.16xlarge
787.5
26700
787.5
26700
tesl_c5a_96
96
192
c5a.24xlarge
1187.5
40000
1187.5
40000
tesl_m5a_2
2
8
m5a.large
81.25
3600
360
16000
tesl_m5a_4
4
16
m5a.xlarge
135.625
6000
360
16000
tesl_m5a_8
8
32
m5a.2xlarge
197.5
8333
360
16000
tesl_m5a_16
16
64
m5a.4xlarge
360
16000
360
16000
tesl_m5a_32
32
128
m5a.8xlarge
593.75
20000
593.75
20000
tesl_m5a_48
48
192
m5a.12xlarge
847.5
30000
847.5
30000
tesl_m5a_64
64
256
m5a.16xlarge
1187.5
40000
1187.5
40000
tesl_m5a_96
96
384
m5a.24xlarge
1718.75
60000
1718.75
60000
tesl_x2idn_64
64
1024
x2idn.16xlarge
5000
173333
5000
173333
tesl_x2idn_96
96
1536
x2idn.24xlarge
7500
260000
7500
260000
tesl_x2idn_128
128
2048
x2idn.32xlarge
10000
260000
10000
260000
tesl_r6i_2
2
16
r6i.large
81.25
3600
1250
40000
tesl_r6i_4
4
32
r6i.xlarge
156.25
6000
1250
40000
tesl_r6i_8
8
64
r6i.2xlarge
312.5
12000
1250
40000
tesl_r6i_48
48
384
r6i.12xlarge
1875
60000
1875
60000
tesl_r6i_128
128
1024
r6i.32xlarge
5000
160000
5000
160000
tesl_r6a_48
48
384
r6a.12xlarge
1875
60000
1875
60000
tesl_r6a_128
128
1024
r6a.32xlarge
5000
160000
5000
160000
tesl_r6a_192
192
1536
r6a.48xlarge
5000
240000
5000
240000
tesl_r6in_128
128
1024
r6in.32xlarge
12500
400000
12500
400000
tesl_r7a_192
192
1536
r7a.48xlarge
5000
240000
5000
240000
tesl_r5b_4
4
32
r5b.xlarge
312.5
10833
1250
43333
tesl_x2iedn_16
16
512
x2iedn.4xlarge
1250
32500
2500
65000
tesl_x2iedn_4
4
128
x2iedn.xlarge
312.5
8125
2500
65000
Azure
This table lists the compute shapes for your standard performance databases hosted on the Azure cloud platform:
Micro
2
1
Standard_D4as_V5
144
6400
600
20000
Small
2
1
Standard_D4as_V5
144
6400
600
20000
Medium
2
1
Standard_D4as_V5
144
6400
600
20000
Large
2
1
Standard_D4as_V5
144
6400
600
20000
tesl_4_a
4
16
Standard_D4as_V5
144
6400
600
20000
tesl_4_b
4
32
Standard_E4as_V5
144
6400
600
20000
tesl_8_a
8
32
Standard_D8as_V5
200
12800
600
20000
tesl_8_b
8
64
Standard_E8as_V5
200
12800
600
20000
tesl_Esv5_8
8
64
Standard_E8s_v5
290
12800
1200
20000
tesl_16_a
16
64
Standard_D16as_V5
384
25600
800
40000
tesl_16_b
16
128
Standard_E16as_V5
384
25600
800
40000
tesl_16_b-8
8
128
Standard_E16-8as_V5
384
25600
800
40000
tesl_20_a
20
160
Standard_E20as_V5
480
32000
1000
64000
tesl_32_a
32
128
Standard_D32as_V5
768
51200
1600
80000
tesl_32_b
32
256
Standard_E32as_v5
768
51200
1600
80000
tesl_32_c
32
875
Standard_M32ms_v2
476.8371582
20000
1000
40000
tesl_32_c-8
8
875
Standard_M32-8ms
500
20000
1000
40000
tesl_32_c-16
16
875
Standard_M32-16ms
500
20000
1000
40000
tesl_32_d
32
256
Standard_E32s_v5
865
51200
2000
80000
tesl_32_d-8
8
256
Standard_E32-8s_v5
865
51200
2000
80000
tesl_48_a
48
192
Standard_D48as_v5
1152
76800
2000
80000
tesl_48_b
48
384
Standard_E48as_v5
1152
76800
2000
80000
tesl_64_a
64
256
Standard_D64as_v5
1200
80000
2000
80000
tesl_64_b
64
512
Standard_E64as_v5
1200
80000
2000
80000
tesl_64_c
64
1792
Standard_M64ms_v2
953.6743164
40000
2000
80000
tesl_64_c-16
16
1792
Standard_M64-16ms
953.6743164
40000
2000
80000
tesl_64_c-32
32
1792
Standard_M64-32ms
953.6743164
40000
2000
80000
tesl_96_a
96
384
Standard_D96as_v5
1600
80000
2000
80000
tesl_96_b
96
672
Standard_E96as_v5
1600
80000
2000
80000
tesl_96_c
96
672
Standard_E96s_v5
2600
80000
4000
80000
tesl_96_c-24
24
672
Standard_E96-24s_v5
2600
80000
4000
80000
tesl_128_a
128
3892
Standard_M128ms_v2
1907.348633
80000
4000
80000
tesl_128_a-32
32
3892
Standard_M128-32ms
1907.348633
80000
4000
80000
tesl_128_a-64
64
3892
Standard_M128-64ms
1907.348633
80000
4000
80000
tesl_192_a
192
2048
Standard_M192is_v2
1907.348633
80000
4000
80000
tesl_192_b
192
4096
Standard_M192ims_v2
1907.348633
80000
4000
80000
tesl_208_a
208
2850
Standard_M208s_v2
1000
40000
1000
40000
tesl_basv2_16
16
64
Standard_B16as_v2
572.2045898
25600
960
40000
tesl_basv2_32
32
128
Standard_B32as_v2
824.9282837
51200
960
80000
tesl_bma_2_a
2
16
Standard_E2ds_V4
48
3200
200
4000
tesl_bma_4_a
4
32
Standard_E4ds_V4
96
6400
200
8000
tesl_bma_8_a
8
64
Standard_E8ds_V4
192
12800
400
16000
tesl_bma_16_a
16
128
Standard_E16ds_V4
384
25600
800
32000
tesl_bma_32_a
32
256
Standard_E32ds_V4
768
51200
1600
64000
tesl_bma_48_a
48
384
Standard_E48ds_V4
1152
76800
2000
80000
tesl_bma_64_a
64
504
Standard_E64ds_V4
1200
80000
2000
80000
tesl_bma_96_a
96
672
Standard_E96a_v4
null
null
None
None
tesl_4_b-2
2
32
Standard_E4-2as_V5
144
6400
600
20000
tesl_Esv5_64-16
16
512
Standard_E64-16s_v5
1735
80000
3000
80000
tesl_Esv5_32-16
16
256
Standard_E32-16s_v5
865
51200
2000
80000
tesl_Ebdsv5_64
64
512
Standard_E64bds_v5
3814.697266
120000
4000
120000
tesl_Ms4v3_176
176
3892
Standard_M176s_4_v3
3814.697266
130000
3814.697266
130000
tesl_M8-4ms
4
218
Standard_M8-4ms
125
5000
250
10000
tesl_M16-4ms
4
437
Standard_M16-4ms
238.4185791
10000
500
20000
tesl_Mms_128-32
32
3892
Standard_M128-32ms
1907.348633
80000
4000
80000
tesl_Ebsv5_48
48
384
Standard_E48bs_v5
3814.697266
120000
4000
120000
tesl_Esv5_96-24
24
672
Standard_E96-24s_v5
2600
80000
4000
80000
tesl_Esv5_32-8
8
256
Standard_E32-8s_v5
865
51200
2000
80000
tesl_Esv5_4-2
2
32
Standard_E4-2s_v5
145
6400
1200
20000
tesl_Esv5_16-4
4
128
Standard_E16-4s_v5
600
25600
1200
40000
tesl_Esv5_8-4
4
64
Standard_E8-4s_v5
290
12800
1200
20000
tesl_Easv6_4
4
32
Standard_E4as_v6
180
7600
1250
20000
tesl_Easv6_8
8
64
Standard_E8as_v6
360
15200
1250
20000
tesl_Easv6_16
16
128
Standard_E16as_v6
720
30400
1250
40000
tesl_Easv6_20
20
160
Standard_E20as_v6
900
38000
1600
64000
tesl_Easv6_32
32
256
Standard_E32as_v6
1440
57600
1700
80000
tesl_Easv6_48
48
384
Standard_E48as_v6
2160
86400
2550
90000
tesl_Easv6_64
64
512
Standard_E64as_v6
2880
115200
3400
120000
tesl_Easv6_96
96
672
Standard_E96as_v6
4320
175000
5090
175000
tesl_Esv6_2
2
16
Standard_E2s_v6
124
4167
1463
44444
tesl_Esv6_4
4
32
Standard_E4s_v6
248
8333
1463
52083
tesl_E4sv6_2
2
32
Standard_E4-2s_v6
248
8333
1463
52083
tesl_Esv6_8
8
64
Standard_E8s_v6
496
16667
1463
52083
tesl_E8sv6_2
2
64
Standard_E8-2s_v6
496
16667
1463
52083
tesl_E8sv6_4
4
64
Standard_E8-4s_v6
496
16667
1463
52083
tesl_Esv6_16
16
128
Standard_E16s_v6
992
33333
1463
52083
tesl_E16sv6_4
4
128
Standard_E16-4s_v6
992
33333
1463
52083
tesl_E16sv6_8
8
128
Standard_E16-8s_v6
992
33333
1463
52083
tesl_Esv6_20
20
160
Standard_E20s_v6
1240
41667
1872
83333
tesl_Esv6_32
32
256
Standard_E32s_v6
1984
66667
1984
104167
tesl_E32sv6_8
8
256
Standard_E32-8s_v6
1984
66667
1984
104167
tesl_E32sv6_16
16
256
Standard_E32-16s_v6
1984
66667
1984
104167
tesl_Esv6_48
48
384
Standard_E48s_v6
2976
100000
2976
104167
tesl_Esv6_64
64
512
Standard_E64s_v6
3969
133333
3969
133333
tesl_E64sv6_16
16
512
Standard_E64-16s_v6
3969
133333
3969
133333
tesl_E64sv6_32
32
512
Standard_E64-32s_v6
3969
133333
3969
133333
tesl_Esv6_96
96
768
Standard_E96s_v6
5953
200000
5953
200000
tesl_E96sv6_24
24
768
Standard_E96-24s_v6
5953
200000
5953
200000
tesl_E96sv6_48
48
768
Standard_E96-48s_v6
5953
200000
5953
200000
GCP
This table lists the compute shapes for your standard performance databases hosted on the Google cloud platform:
c3d-highcpu-4
4
8
4
4 vCPUs, 8 GB RAM
highcpu
c3d-highcpu-8
8
16
8
8 vCPUs, 16 GB RAM
highcpu
c3d-highcpu-16
16
32
16
16 vCPUs, 32 GB RAM
highcpu
c3d-highcpu-30
30
59
30
30 vCPUs, 59 GB RAM
highcpu
c3d-highcpu-60
60
118
60
60 vCPUs, 118 GB RAM
highcpu
c3d-highcpu-90
90
177
90
90 vCPUs, 177 GB RAM
highcpu
c3d-highcpu-180
180
354
180
180 vCPUs, 354 GB RAM
highcpu
c3d-highcpu-360
360
708
360
360 vCPUs, 708 GB RAM
highcpu
c3d-highmem-4
4
32
4
4 vCPUs, 32 GB RAM
highmem
c3d-highmem-8
8
64
8
8 vCPUs, 64 GB RAM
highmem
c3d-highmem-16
16
128
16
16 vCPUs, 128 GB RAM
highmem
c3d-highmem-30
30
240
30
30 vCPUs, 240 GB RAM
highmem
c3d-highmem-60
60
480
60
60 vCPUs, 480 GB RAM
highmem
c3d-highmem-90
90
720
90
90 vCPUs, 720 GB RAM
highmem
c3d-highmem-180
180
1440
180
180 vCPUs, 1440 GB RAM
highmem
c3d-highmem-360
360
2880
360
360 vCPUs, 2880 GB RAM
highmem
c3d-standard-4
4
16
4
4 vCPUs, 16 GB RAM
standard
c3d-standard-8
8
32
8
8 vCPUs, 32 GB RAM
standard
c3d-standard-16
16
64
16
16 vCPUs, 64 GB RAM
standard
c3d-standard-30
30
120
30
30 vCPUs, 120 GB RAM
standard
c3d-standard-60
60
240
60
60 vCPUs, 240 GB RAM
standard
c3d-standard-90
90
360
90
90 vCPUs, 360 GB RAM
standard
c3d-standard-180
180
720
180
180 vCPUs, 720 GB RAM
standard
c3d-standard-360
360
1440
360
360 vCPUs, 1440 GB RAM
standard
c4-highcpu-2
2
4
2
2 vCPUs, 4 GB RAM
highcpu
c4-highcpu-4
4
8
4
4 vCPUs, 8 GB RAM
highcpu
c4-highcpu-8
8
16
8
8 vCPUs, 16 GB RAM
highcpu
c4-highcpu-16
16
32
16
16 vCPUs, 32 GB RAM
highcpu
c4-highcpu-32
32
64
32
32 vCPUs, 64 GB RAM
highcpu
c4-highcpu-48
48
96
48
48 vCPUs, 96 GB RAM
highcpu
c4-highcpu-96
96
192
96
96 vCPUs, 192 GB RAM
highcpu
c4-highcpu-192
192
384
192
192 vCPUs, 384 GB RAM
highcpu
c4-highmem-2
2
15
2
2 vCPUs, 15 GB RAM
highmem
c4-highmem-4
4
31
4
4 vCPUs, 31 GB RAM
highmem
c4-highmem-8
8
62
8
8 vCPUs, 62 GB RAM
highmem
c4-highmem-16
16
124
16
16 vCPUs, 124 GB RAM
highmem
c4-highmem-32
32
248
32
32 vCPUs, 248 GB RAM
highmem
c4-highmem-48
48
372
48
48 vCPUs, 372 GB RAM
highmem
c4-highmem-96
96
744
96
96 vCPUs, 744 GB RAM
highmem
c4-highmem-192
192
1488
192
192 vCPUs, 1488 GB RAM
highmem
c4-standard-2
2
7
2
2 vCPUs, 7 GB RAM
standard
c4-standard-4
4
15
4
4 vCPUs, 15 GB RAM
standard
c4-standard-8
8
30
8
8 vCPUs, 30 GB RAM
standard
c4-standard-16
16
60
16
16 vCPUs, 60 GB RAM
standard
c4-standard-32
32
120
32
32 vCPUs, 120 GB RAM
standard
c4-standard-48
48
180
48
48 vCPUs, 180 GB RAM
standard
c4-standard-96
96
360
96
96 vCPUs, 360 GB RAM
standard
c4-standard-192
192
720
192
192 vCPUs, 720 GB RAM
standard
h3-standard-88
88
352
88
88 vCPUs, 352 GB RAM
standard
m1-ultramem-40
40
961
40
40 vCPUs, 961 GB RAM
standard
m1-ultramem-80
80
1922
80
80 vCPUs, 1922 GB RAM
standard
m1-megamem-96
96
1433
96
96 vCPUs, 1.4 TB RAM
standard
m1-ultramem-160
160
3844
160
160 vCPUs, 3844 GB RAM
standard
m2-ultramem-208
208
5888
208
208 vCPUs, 5.75 TB RAM
standard
m2-megamem-416
416
5888
416
416 vCPUs, 5.75 TB RAM
standard
m2-hypermem-416
416
8832
416
416 vCPUs, 8.625 TB RAM
standard
m2-ultramem-416
416
11776
416
416 vCPUs, 11.50 TB RAM
standard
n4-highcpu-2
2
4
2
2 vCPUs, 4 GB RAM
highcpu
n4-highcpu-4
4
8
4
4 vCPUs, 8 GB RAM
highcpu
n4-highcpu-8
8
16
8
8 vCPUs, 16 GB RAM
highcpu
n4-highcpu-16
16
32
16
16 vCPUs, 32 GB RAM
highcpu
n4-highcpu-32
32
64
32
32 vCPUs, 64 GB RAM
highcpu
n4-highcpu-48
48
96
48
48 vCPUs, 96 GB RAM
highcpu
n4-highcpu-64
64
128
64
64 vCPUs, 128 GB RAM
highcpu
n4-highcpu-80
80
160
80
80 vCPUs, 160 GB RAM
highcpu
n4-highmem-2
2
16
2
2 vCPUs, 16 GB RAM
highmem
n4-highmem-4
4
32
4
4 vCPUs, 32 GB RAM
highmem
n4-highmem-8
8
64
8
8 vCPUs, 64 GB RAM
highmem
n4-highmem-16
16
128
16
16 vCPUs, 128 GB RAM
highmem
n4-highmem-32
32
256
32
32 vCPUs, 256 GB RAM
highmem
n4-highmem-48
48
384
48
48 vCPUs, 384 GB RAM
highmem
n4-highmem-64
64
512
64
64 vCPUs, 512 GB RAM
highmem
n4-highmem-80
80
640
80
80 vCPUs, 640 GB RAM
highmem
n4-standard-2
2
8
2
2 vCPUs, 8 GB RAM
standard
n4-standard-4
4
16
4
4 vCPUs, 16 GB RAM
standard
n4-standard-8
8
32
8
8 vCPUs, 32 GB RAM
standard
n4-standard-16
16
64
16
16 vCPUs, 64 GB RAM
standard
n4-standard-32
32
128
32
32 vCPUs, 128 GB RAM
standard
n4-standard-48
48
192
48
48 vCPUs, 192 GB RAM
standard
n4-standard-64
64
256
64
64 vCPUs, 256 GB RAM
standard
n4-standard-80
80
320
80
80 vCPUs, 320 GB RAM
standard
x4-megamem-960-metal
960
16384
960
960 vCPUs
standard
x4-megamem-1440-metal
1440
24576
1440
1440 vCPUs
standard
x4-megamem-1920-metal
1920
32768
1920
1920 vCPUs
standard
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