Tessell compute shapes
Tessell offers a large number of compute shapes that you can choose depending on your workload type. A compute shape determines the number of VCPUs, the amount of memory and storage that gets allocated to your instance. With Tessell, you can choose from a variety of compute shapes for both AWS, Azure and GCP cloud for your high performance and standard workloads. All compute shapes support the x86 architecture.
High performance compute shapes
High Performance compute shapes for AWS and Azure come with the specified VCPUs, memory, storage, and Read/Write IOPS.
AWS
This table provides lists the compute shapes for your high performance databases hosted on the AWS cloud platform:
tesl_12h_a
i3en.3xlarge
12
tesl_12h
tesl_16h_a
i4i.4xlarge
16
tesl_16h
tesl_16h_a_p
i3.4xlarge
16
tesl_16h
tesl_24h_a
i3en.6xlarge
24
tesl_24h
tesl_2h_a
i4i.large
2
tesl_2h
tesl_2h_a_p
i3.large
2
tesl_2h
tesl_2h_c
i3en.large
2
tesl_2h
tesl_32h_a
i4i.8xlarge
32
tesl_32h
tesl_32h_a_p
i3.8xlarge
32
tesl_32h
tesl_48h_a
i3en.12xlarge
48
tesl_48h
tesl_4h_a
i4i.xlarge
4
tesl_4h
tesl_4h_a_p
i3.xlarge
4
tesl_4h
tesl_4h_c
i3en.xlarge
4
tesl_4h
tesl_64h_a
i4i.16xlarge
64
tesl_64h
tesl_64h_a_p
i3.16xlarge
64
tesl_64h
tesl_8h_a
i4i.2xlarge
8
tesl_8h
tesl_8h_a_p
i3.2xlarge
8
tesl_8h
tesl_8h_c
i3en.2xlarge
8
tesl_8h
tesl_i7i_16
i7i.4xlarge
16
tesl_16h
tesl_i7ie_24
i7ie.6xlarge
24
tesl_24h
Azure
This table lists the compute shapes for your high performance databases hosted on the Azure cloud platform:
tesl_8h_a
Standard_L8s_v3
8
tesl_8h
tesl_16h_a
Standard_L16s_v3
16
tesl_16h
tesl_32h_a
Standard_L32s_v3
32
tesl_32h
tesl_48h_a
Standard_L48s_v3
48
tesl_48h
tesl_64h_a
Standard_L64s_v3
64
tesl_64h
tesl_80h_a
Standard_L80s_v3
80
tesl_80h
Standard performance compute shapes
Standard performance compute shapes come with the specified VCPUs along with standard storage that is expandable depending on the shape that you choose.
AWS
This table lists the compute shapes for your standard performance databases hosted on the AWS cloud platform:
tesl_16_a
m5.4xlarge16
16
tesl_16
tesl_16_b
r5.4xlarge
16
tesl_16
tesl_16_b_a
r6a.4xlarge
16
tesl_16
tesl_2_a
t3.medium
2
tesl_2
tesl_2_b
m5.large
2
tesl_2
tesl_2_c
r5.large
2
tesl_2
tesl_2_c_a
r6a.large
2
tesl_2
tesl_32_a
m5.8xlarge
32
tesl_32
tesl_4_a
m5.xlarge
4
tesl_4
tesl_4_b
r5.xlarge
4
tesl_4
tesl_4_b_a
r6a.xlarge
4
tesl_4
tesl_8_a
m5.2xlarge
8
tesl_8
tesl_8_b
r5.2xlarge
8
tesl_8
tesl_8_b_a
r6a.2xlarge
8
tesl_8
tesl_8_c
t3a.2xlarge
8
tesl_8
tesl_96_b_a
r5.24xlarge
96
tesl_96
tesl_c5a_16
c5a.4xlarge
16
tesl_16
tesl_c5a_2
c5a.large
2
tesl_2
tesl_c5a_32
c5a.8xlarge
32
tesl_32
tesl_c5a_4
c5a.xlarge
4
tesl_4
tesl_c5a_48
c5a.12xlarge
48
tesl_48
tesl_c5a_64
c5a.16xlarge
64
tesl_64
tesl_c5a_8
c5a.2xlarge
8
tesl_8
tesl_c5a_96
c5a.24xlarge
96
tesl_96
tesl_c6a_128
c6a.32xlarge
128
tesl_128
tesl_c6a_16
c6a.4xlarge
16
tesl_16
tesl_c6a_192
c6a.48xlarge
192
tesl_192
tesl_c6a_2
c6a.large
2
tesl_2
tesl_c6a_32
c6a.8xlarge
32
tesl_32
tesl_c6a_4
c6a.xlarge
4
tesl_4
tesl_c6a_48
c6a.12xlarge
48
tesl_48
tesl_c6a_64
c6a.16xlarge
64
tesl_64
tesl_c6a_8
c6a.2xlarge
8
tesl_8
tesl_c6a_96
c6a.24xlarge
96
tesl_96
tesl_c6i_128
c6i.32xlarge
128
tesl_128
tesl_c6i_16
c6i.4xlarge
16
tesl_16
tesl_c6i_2
c6i.large
2
tesl_2
tesl_c6i_32
c6i.8xlarge
32
tesl_32
tesl_c6i_4
c6i.xlarge
4
tesl_4
tesl_c6i_48
c6i.12xlarge
48
tesl_48
tesl_c6i_64
c6i.16xlarge
64
tesl_64
tesl_c6i_8
c6i.2xlarge
8
tesl_8
tesl_c6i_96
c6i.24xlarge
96
tesl_96
tesl_c7a_128
c7a.32xlarge
128
tesl_128
tesl_c7a_16
c7a.4xlarge
16
tesl_16
tesl_c7a_192
c7a.48xlarge
192
tesl_192
tesl_c7a_2
c7a.large
2
tesl_2
tesl_c7a_32
c7a.8xlarge
32
tesl_32
tesl_c7a_4
c7a.xlarge
4
tesl_4
tesl_c7a_48
c7a.12xlarge
48
tesl_48
tesl_c7a_64
c7a.16xlarge
64
tesl_64
tesl_c7a_8
c7a.2xlarge
8
tesl_8
tesl_c7a_96
c7a.24xlarge
96
tesl_96
tesl_c7i_16
c7i.4xlarge
16
tesl_16
tesl_c7i_192
c7i.48xlarge
192
tesl_192
tesl_c7i_2
c7i.large
2
tesl_2
tesl_c7i_32
c7i.8xlarge
32
tesl_32
tesl_c7i_4
c7i.xlarge
4
tesl_4
tesl_c7i_48
c7i.12xlarge
48
tesl_48
tesl_c7i_64
c7i.16xlarge
64
tesl_64
tesl_c7i_8
c7i.2xlarge
8
tesl_8
tesl_c7i_96
c7i.24xlarge
96
tesl_96
tesl_m5a_16
m5a.4xlarge
16
tesl_16
tesl_m5a_2
m5a.large
2
tesl_2
tesl_m5a_32
m5a.8xlarge
32
tesl_32
tesl_m5a_4
m5a.xlarge
4
tesl_4
tesl_m5a_48
m5a.12xlarge
48
tesl_48
tesl_m5a_64
m5a.16xlarge
64
tesl_64
tesl_m5a_8
m5a.2xlarge
8
tesl_8
tesl_m5a_96
m5a.24xlarge
96
tesl_96
tesl_m6a_128
m6a.32xlarge
128
tesl_128
tesl_m6a_16
m6a.4xlarge
16
tesl_16
tesl_m6a_192
m6a.48xlarge
192
tesl_192
tesl_m6a_2
m6a.large
2
tesl_2
tesl_m6a_32
m6a.8xlarge
32
tesl_32
tesl_m6a_4
m6a.xlarge
4
tesl_4
tesl_m6a_48
m6a.12xlarge
48
tesl_48
tesl_m6a_64
m6a.16xlarge
64
tesl_64
tesl_m6a_8
m6a.2xlarge
8
tesl_8
tesl_m6a_96
m6a.24xlarge
96
tesl_96
tesl_m6i_128
m6i.32xlarge
128
tesl_128
tesl_m6i_16
m6i.4xlarge
16
tesl_16
tesl_m6i_2
m6i.large
2
tesl_2
tesl_m6i_32
m6i.8xlarge
32
tesl_32
tesl_m6i_4
m6i.xlarge
4
tesl_4
tesl_m6i_48
m6i.12xlarge
48
tesl_48
tesl_m6i_64
m6i.16xlarge
64
tesl_64
tesl_m6i_8
m6i.2xlarge
8
tesl_8
tesl_m6i_96
m6i.24xlarge
96
tesl_96
tesl_r5b_4
r5b.xlarge
4
tesl_4
tesl_r6a_128
r6a.32xlarge
128
tesl_128
tesl_r6a_192
r6a.48xlarge
192
tesl_192
tesl_r6a_32
r6a.8xlarge
32
tesl_32
tesl_r6a_48
r6a.12xlarge
48
tesl_48
tesl_r6a_64
r6a.16xlarge
64
tesl_64
tesl_r6a_96
r6a.24xlarge
96
tesl_96
tesl_r6i_128
r6i.32xlarge
128
tesl_128
tesl_r6i_16
r6i.4xlarge
16
tesl_16
tesl_r6i_2
r6i.large
2
tesl_2
tesl_r6i_32
r6i.8xlarge
32
tesl_32
tesl_r6i_4
r6i.xlarge
4
tesl_4
tesl_r6i_48
r6i.12xlarge
48
tesl_48
tesl_r6i_64
r6i.16xlarge
64
tesl_64
tesl_r6i_8
r6i.2xlarge
8
tesl_8
tesl_r6i_96
r6i.24xlarge
96
tesl_96
tesl_r6in_128
r6in.32xlarge
128
tesl_128
tesl_r7a_16
r7a.4xlarge
16
tesl_16
tesl_r7a_192
r7a.48xlarge
192
tesl_192
tesl_r7a_2
r7a.large
2
tesl_2
tesl_r7a_32
r7a.8xlarge
32
tesl_32
tesl_r7a_4
r7a.xlarge
4
tesl_4
tesl_r7a_8
r7a.2xlarge
8
tesl_8
tesl_r7i_16
r7i.4xlarge
16
tesl_16
tesl_r7i_2
r7i.large
2
tesl_2
tesl_r7i_32
r7i.8xlarge
32
tesl_32
tesl_r7i_4
r7i.xlarge
4
tesl_4
tesl_r7i_48
r7i.12xlarge
48
tesl_48
tesl_r7i_64
r7i.16xlarge
64
tesl_64
tesl_r7i_8
r7i.2xlarge
8
tesl_8
tesl_r7i_96
r7i.24xlarge
96
tesl_96
tesl_x2idn_128
x2idn.32xlarge
128
tesl_128
tesl_x2idn_64
x2idn.16xlarge
64
tesl_64
tesl_x2idn_96
x2idn.24xlarge
96
tesl_96
tesl_x2iedn_16
x2iedn.4xlarge
16
tesl_16
tesl_x2iedn_4
x2iedn.xlarge
4
tesl_4
Azure
This table lists the compute shapes for your standard performance databases hosted on the Azure cloud platform:
tesl_128_a
Standard_M128ms_v2
128
tesl_128
tesl_128_a-32
Standard_M128-32ms
32
tesl_32
tesl_128_a-64
Standard_M128-64ms
64
tesl_64
tesl_16_a
Standard_D16as_V5
16
tesl_16
tesl_16_b
Standard_E16as_V5
16
tesl_16
tesl_16_b-8
Standard_E16-8as_V5
8
tesl_8
tesl_192_a
Standard_M192is_v2
192
tesl_192
tesl_192_b
Standard_M192ims_v2
192
tesl_192
tesl_208_a
Standard_M208s_v2
208
tesl_208
tesl_20_a
Standard_E20as_V5
20
tesl_20
tesl_32_a
Standard_D32as_V5
32
tesl_32
tesl_32_b
Standard_E32as_v5
32
tesl_32
tesl_32_c
Standard_M32ms_v2
32
tesl_32
tesl_32_c-16
Standard_M32-16ms
16
tesl_16
tesl_32_c-8
Standard_M32-8ms
8
tesl_8
tesl_32_d
Standard_E32s_v5
32
tesl_32
tesl_32_d-8
Standard_E32-8s_v5
8
tesl_8
tesl_48_a
Standard_D48as_v5
48
tesl_48
tesl_48_b
Standard_E48as_v5
48
tesl_48
tesl_4_a
Standard_D4as_V5
4
tesl_4
tesl_4_b
Standard_E4as_V5
4
tesl_4
tesl_4_b-2
Standard_E4-2as_V5
2
tesl_2
tesl_64_a
Standard_D64as_v5
64
tesl_64
tesl_64_b
Standard_E64as_v5
64
tesl_64
tesl_64_c
Standard_M64ms_v2
64
tesl_64
tesl_64_c-16
Standard_M64-16ms
16
tesl_16
tesl_64_c-32
Standard_M64-32ms
32
tesl_32
tesl_8_a
Standard_D8as_V5
8
tesl_8
tesl_8_b
Standard_E8as_V5
8
tesl_8
tesl_96_a
Standard_D96as_v5
96
tesl_96
tesl_96_b
Standard_E96as_v5
96
tesl_96
tesl_96_c
Standard_E96s_v5
96
tesl_96
tesl_96_c-24
Standard_E96-24s_v5
24
tesl_24
tesl_E16sv6_4
Standard_E16-4s_v6
4
tesl_4
tesl_E16sv6_8
Standard_E16-8s_v6
8
tesl_8
tesl_E32sv6_16
Standard_E32-16s_v6
16
tesl_16
tesl_E32sv6_8
Standard_E32-8s_v6
8
tesl_8
tesl_E4sv6_2
Standard_E4-2s_v6
2
tesl_2
tesl_E64sv6_16
Standard_E64-16s_v6
16
tesl_16
tesl_E64sv6_32
Standard_E64-32s_v6
32
tesl_32
tesl_E8sv6_2
Standard_E8-2s_v6
2
tesl_2
tesl_E8sv6_4
Standard_E8-4s_v6
4
tesl_4
tesl_E96sv6_24
Standard_E96-24s_v6
24
tesl_24
tesl_E96sv6_48
Standard_E96-48s_v6
48
tesl_48
tesl_Easv5_16-4
Standard_E16-4as_v5
4
tesl_4
tesl_Easv5_32-16
Standard_E32-16as_v5
16
tesl_16
tesl_Easv5_32-8
Standard_E32-8as_v5
8
tesl_8
tesl_Easv5_64-16
Standard_E64-16as_v5
16
tesl_16
tesl_Easv5_64-32
Standard_E64-32as_v5
32
tesl_32
tesl_Easv5_8-2
Standard_E8-2as_v5
2
tesl_2
tesl_Easv5_8-4
Standard_E8-4as_v5
4
tesl_4
tesl_Easv5_96-24
Standard_E96-24as_v5
24
tesl_24
tesl_Easv5_96-48
Standard_E96-48as_v5
48
tesl_48
tesl_Easv6_16
Standard_E16as_v6
16
tesl_16
tesl_Easv6_20
Standard_E20as_v6
20
tesl_20
tesl_Easv6_32
Standard_E32as_v6
32
tesl_32
tesl_Easv6_4
Standard_E4as_v6
4
tesl_4
tesl_Easv6_48
Standard_E48as_v6
48
tesl_48
tesl_Easv6_64
Standard_E64as_v6
64
tesl_64
tesl_Easv6_8
Standard_E8as_v6
8
tesl_8
tesl_Easv6_96
Standard_E96as_v6
96
tesl_96
tesl_Ebdsv5_64
Standard_E64bds_v5
64
tesl_64
tesl_Ebsv5_16
Standard_E16bs_v5
16
tesl_16
tesl_Ebsv5_32
Standard_E32bs_v5
32
tesl_32
tesl_Ebsv5_4
Standard_E4bs_v5
4
tesl_4
tesl_Ebsv5_48
Standard_E48bs_v5
48
tesl_48
tesl_Ebsv5_64
Standard_E64bs_v5
64
tesl_64
tesl_Ebsv5_8
Standard_E8bs_v5
8
tesl_8
tesl_Ebsv5_96
Standard_E96bs_v5
96
tesl_96
tesl_Eiasv5_112
Standard_E112ias_v5
112
tesl_112
tesl_Eisv5_104
Standard_E104is_v5
104
tesl_104
tesl_Esv5_16
Standard_E16s_v5
16
tesl_16
tesl_Esv5_16-4
Standard_E16-4s_v5
4
tesl_4
tesl_Esv5_16-8
Standard_E16-8s_v5
8
tesl_8
tesl_Esv5_20
Standard_E20s_v5
20
tesl_20
tesl_Esv5_32-16
Standard_E32-16s_v5
16
tesl_16
tesl_Esv5_4
Standard_E4s_v5
4
tesl_4
tesl_Esv5_4-2
Standard_E4-2s_v5
2
tesl_2
tesl_Esv5_48
Standard_E48s_v5
48
tesl_48
tesl_Esv5_64
Standard_E64s_v5
64
tesl_64
tesl_Esv5_64-16
Standard_E64-16s_v5
16
tesl_16
tesl_Esv5_64-32
Standard_E64-32s_v5
32
tesl_32
tesl_Esv5_8
Standard_E8s_v5
8
tesl_8
tesl_Esv5_8-2
Standard_E8-2s_v5
2
tesl_2
tesl_Esv5_8-4
Standard_E8-4s_v5
4
tesl_4
tesl_Esv5_96-48
Standard_E96-48s_v5
48
tesl_48
tesl_Esv6_16
Standard_E16s_v6
16
tesl_16
tesl_Esv6_2
Standard_E2s_v6
2
tesl_2
tesl_Esv6_20
Standard_E20s_v6
20
tesl_20
tesl_Esv6_32
Standard_E32s_v6
32
tesl_32
tesl_Esv6_4
Standard_E4s_v6
4
tesl_4
tesl_Esv6_48
Standard_E48s_v6
48
tesl_48
tesl_Esv6_64
Standard_E64s_v6
64
tesl_64
tesl_Esv6_8
Standard_E8s_v6
8
tesl_8
tesl_Esv6_96
Standard_E96s_v6
96
tesl_96
tesl_M16-4ms
Standard_M16-4ms
4
tesl_4
tesl_M8-4ms
Standard_M8-4ms
4
tesl_4
tesl_Ms4v3_176
Standard_M176s_4_v3
176
tesl_176
tesl_basv2_16
Standard_B16as_v2
16
tesl_16
tesl_basv2_32
Standard_B32as_v2
32
tesl_32
GCP
This table lists the compute shapes for your standard performance databases hosted on the Google cloud platform:
c3d-highcpu-4
4
8
4
4 vCPUs, 8 GB RAM
highcpu
c3d-highcpu-8
8
16
8
8 vCPUs, 16 GB RAM
highcpu
c3d-highcpu-16
16
32
16
16 vCPUs, 32 GB RAM
highcpu
c3d-highcpu-30
30
59
30
30 vCPUs, 59 GB RAM
highcpu
c3d-highcpu-60
60
118
60
60 vCPUs, 118 GB RAM
highcpu
c3d-highcpu-90
90
177
90
90 vCPUs, 177 GB RAM
highcpu
c3d-highcpu-180
180
354
180
180 vCPUs, 354 GB RAM
highcpu
c3d-highcpu-360
360
708
360
360 vCPUs, 708 GB RAM
highcpu
c3d-highmem-4
4
32
4
4 vCPUs, 32 GB RAM
highmem
c3d-highmem-8
8
64
8
8 vCPUs, 64 GB RAM
highmem
c3d-highmem-16
16
128
16
16 vCPUs, 128 GB RAM
highmem
c3d-highmem-30
30
240
30
30 vCPUs, 240 GB RAM
highmem
c3d-highmem-60
60
480
60
60 vCPUs, 480 GB RAM
highmem
c3d-highmem-90
90
720
90
90 vCPUs, 720 GB RAM
highmem
c3d-highmem-180
180
1440
180
180 vCPUs, 1440 GB RAM
highmem
c3d-highmem-360
360
2880
360
360 vCPUs, 2880 GB RAM
highmem
c3d-standard-4
4
16
4
4 vCPUs, 16 GB RAM
standard
c3d-standard-8
8
32
8
8 vCPUs, 32 GB RAM
standard
c3d-standard-16
16
64
16
16 vCPUs, 64 GB RAM
standard
c3d-standard-30
30
120
30
30 vCPUs, 120 GB RAM
standard
c3d-standard-60
60
240
60
60 vCPUs, 240 GB RAM
standard
c3d-standard-90
90
360
90
90 vCPUs, 360 GB RAM
standard
c3d-standard-180
180
720
180
180 vCPUs, 720 GB RAM
standard
c3d-standard-360
360
1440
360
360 vCPUs, 1440 GB RAM
standard
c4-highcpu-2
2
4
2
2 vCPUs, 4 GB RAM
highcpu
c4-highcpu-4
4
8
4
4 vCPUs, 8 GB RAM
highcpu
c4-highcpu-8
8
16
8
8 vCPUs, 16 GB RAM
highcpu
c4-highcpu-16
16
32
16
16 vCPUs, 32 GB RAM
highcpu
c4-highcpu-32
32
64
32
32 vCPUs, 64 GB RAM
highcpu
c4-highcpu-48
48
96
48
48 vCPUs, 96 GB RAM
highcpu
c4-highcpu-96
96
192
96
96 vCPUs, 192 GB RAM
highcpu
c4-highcpu-192
192
384
192
192 vCPUs, 384 GB RAM
highcpu
c4-highmem-2
2
15
2
2 vCPUs, 15 GB RAM
highmem
c4-highmem-4
4
31
4
4 vCPUs, 31 GB RAM
highmem
c4-highmem-8
8
62
8
8 vCPUs, 62 GB RAM
highmem
c4-highmem-16
16
124
16
16 vCPUs, 124 GB RAM
highmem
c4-highmem-32
32
248
32
32 vCPUs, 248 GB RAM
highmem
c4-highmem-48
48
372
48
48 vCPUs, 372 GB RAM
highmem
c4-highmem-96
96
744
96
96 vCPUs, 744 GB RAM
highmem
c4-highmem-192
192
1488
192
192 vCPUs, 1488 GB RAM
highmem
c4-standard-2
2
7
2
2 vCPUs, 7 GB RAM
standard
c4-standard-4
4
15
4
4 vCPUs, 15 GB RAM
standard
c4-standard-8
8
30
8
8 vCPUs, 30 GB RAM
standard
c4-standard-16
16
60
16
16 vCPUs, 60 GB RAM
standard
c4-standard-32
32
120
32
32 vCPUs, 120 GB RAM
standard
c4-standard-48
48
180
48
48 vCPUs, 180 GB RAM
standard
c4-standard-96
96
360
96
96 vCPUs, 360 GB RAM
standard
c4-standard-192
192
720
192
192 vCPUs, 720 GB RAM
standard
h3-standard-88
88
352
88
88 vCPUs, 352 GB RAM
standard
m1-ultramem-40
40
961
40
40 vCPUs, 961 GB RAM
standard
m1-ultramem-80
80
1922
80
80 vCPUs, 1922 GB RAM
standard
m1-megamem-96
96
1433
96
96 vCPUs, 1.4 TB RAM
standard
m1-ultramem-160
160
3844
160
160 vCPUs, 3844 GB RAM
standard
m2-ultramem-208
208
5888
208
208 vCPUs, 5.75 TB RAM
standard
m2-megamem-416
416
5888
416
416 vCPUs, 5.75 TB RAM
standard
m2-hypermem-416
416
8832
416
416 vCPUs, 8.625 TB RAM
standard
m2-ultramem-416
416
11776
416
416 vCPUs, 11.50 TB RAM
standard
n4-highcpu-2
2
4
2
2 vCPUs, 4 GB RAM
highcpu
n4-highcpu-4
4
8
4
4 vCPUs, 8 GB RAM
highcpu
n4-highcpu-8
8
16
8
8 vCPUs, 16 GB RAM
highcpu
n4-highcpu-16
16
32
16
16 vCPUs, 32 GB RAM
highcpu
n4-highcpu-32
32
64
32
32 vCPUs, 64 GB RAM
highcpu
n4-highcpu-48
48
96
48
48 vCPUs, 96 GB RAM
highcpu
n4-highcpu-64
64
128
64
64 vCPUs, 128 GB RAM
highcpu
n4-highcpu-80
80
160
80
80 vCPUs, 160 GB RAM
highcpu
n4-highmem-2
2
16
2
2 vCPUs, 16 GB RAM
highmem
n4-highmem-4
4
32
4
4 vCPUs, 32 GB RAM
highmem
n4-highmem-8
8
64
8
8 vCPUs, 64 GB RAM
highmem
n4-highmem-16
16
128
16
16 vCPUs, 128 GB RAM
highmem
n4-highmem-32
32
256
32
32 vCPUs, 256 GB RAM
highmem
n4-highmem-48
48
384
48
48 vCPUs, 384 GB RAM
highmem
n4-highmem-64
64
512
64
64 vCPUs, 512 GB RAM
highmem
n4-highmem-80
80
640
80
80 vCPUs, 640 GB RAM
highmem
n4-standard-2
2
8
2
2 vCPUs, 8 GB RAM
standard
n4-standard-4
4
16
4
4 vCPUs, 16 GB RAM
standard
n4-standard-8
8
32
8
8 vCPUs, 32 GB RAM
standard
n4-standard-16
16
64
16
16 vCPUs, 64 GB RAM
standard
n4-standard-32
32
128
32
32 vCPUs, 128 GB RAM
standard
n4-standard-48
48
192
48
48 vCPUs, 192 GB RAM
standard
n4-standard-64
64
256
64
64 vCPUs, 256 GB RAM
standard
n4-standard-80
80
320
80
80 vCPUs, 320 GB RAM
standard
x4-megamem-960-metal
960
16384
960
960 vCPUs
standard
x4-megamem-1440-metal
1440
24576
1440
1440 vCPUs
standard
x4-megamem-1920-metal
1920
32768
1920
1920 vCPUs
standard
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